Metal oxide semiconductors are well known in the art. With the rapid integration of elements in the device, the thickness of the silicon oxide gate dielectric layer has approached the 2 nm thickness level. Such thin gate oxide layers require stringent protocols during fabrication especially in the gate etching process. In addition, concomitant with this reduction in the thickness of the gate oxide layer is the device's high leakage current caused by direct tunneling effects.
Shinriki et. al., U.S. Pat. No. 5,292,673 describes a MOSFET that contains a tantalum pentoxide gate insulating film. Although the patent asserts that the device exhibits improved electrical characteristics, nevertheless, it is believed that the device suffers from, among other things, high leakage currents because of the silicon oxide layer, which is formed by reoxidation between the tantalum pentoxide gate insulating film and the silicon substrate, has defects including non-uniformity.